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Phase locked loop (PLL)

PLL is a feedback control circuit that uses the external input reference signal to control the oscillating signal within the loop and output accurate frequency and phase.

Key Features

  • The INS83XX series of PLL chips feature extremely low phase noise and jitter, programmable bandwidth, dual PLL, support for input and output of any frequency, and clock accuracy better than 0.05ppm in hold mode. 

Applications

  • Base station, microwave communication etc.
  • Data converter clock
  • Transmission network
  • Medical, video etc.
  • Instruments

PLL with low jitter

TypeOutput
channel		Output
level		Output freq.
（MHz）		RMS jitter
（fs）		Input channelInput levelVoltage
INS832014LVDS/
LVPECL/
LVCMOS		DC ~ 3000< 1253LVDS/
LVPECL/
LVCMOS/
Crystal		3.3

RF PLL with Low noise

TypeIntegrated VCONormalized phase noise
（dBc/Hz）		Max. output freq.
（GHz）
INS85XXY-23010